The present invention relates to a circuit for generating a gray-scale signal of the pulse-width modulation type, and to a matrix-addressed liquid crystal display employing this circuit.
In many liquid crystal displays, each picture element has only on and off states, so intermediate gray levels are displayed by switching the picture element on and off repeatedly arid controlling the on-off duty cycle. This technique is known as frame rate control, or more generally as pulse-width modulation. In a color display, such as a color liquid crystal television set, this technique can be used to display a large number of colors by mixing different intensities or red, blue, and green. The term `gray scale` is commonly employed to denote these intensities, even though color is involved. Liquid crystal television sets employ matrix addressing, in which the picture elements on the display screen are scanned a line at a time.
A problem that arises is that to display the large number of gray levels needed for a natural display appearance, the interval of time during which a picture element is scanned must be finely divided, requiring a high-frequency timing clock signal. The use of a high-frequency clock signal increases the power dissipation of the display. In addition, the liquid crystal material must be capable of responding to voltage changes at speeds comparable to the speed of the timing clock signal, but liquid crystal materials with very fast response times are not easy to find.